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Education Short Courses
Analog Device Failure Analysis
| Instructor: | Mike Salinas Analog Devices Wilmington, MA |
Overview:
This course will introduce or re-introduce analog design and cover some of the important differences between analog and digital. It will proceed to common-sense modeling of anomalous electrical behavior that can be used to narrow down the location of potential failure mechanisms. It will then cover data from analytical tools to further refine failure localization as well as help to characterize the suspected failure mechanism. It will move on to concerns regarding physical and chemical deprocessing and failure mechanism imaging.
DFT in a Day -- An In-Depth Overview
| Co-Instructors: | Dr. Martin Keim |
Overview:
The course is tailored towards the failure analysis engineer or manager, looking for a working knowledge of best practices with state-of-the-art Design-For-Test technology. While the emphasis will be on Test specific tasks and techniques, an overview of the entire design process is provided in order to explain commonly used terms and acronyms.
EOS & ESD Basics: Principles and Applications to Failure Analysis
| Instructor: | Dr. Leo G. Henry ESD/TLP Consulting and Training Fremont, CA |
Overview:
This full day course/class will define and explain the three ESD models : Human Body Model (HBM), the Machine Model (MM), and the Charged Device Model (CDM) . The course will show the distinction between the component level ESD stress and the system level ESD stress. It will address the four associated ESD Standards, show how to use the 3 main ESD component level standards to perform stress testing, and relate these to the results of the Failure Analysis. The class will teach how to differentiate between EOS and ESD failures and between the 3 ESD type failures, and also the morphology and the physical location of the failures on the die.
Fault Isolation
| Instructor: | Dave Vallett IBM Essex Junction, VT |
Overview:
Microelectronic and now nanoelectronic fault isolation has become increasingly challenging with higher density packaging, transistor counts into the billions, scaling below 45 nanometers, and new materials. This course examines both traditional and recently developed tools and techniques for isolating faults on simple and advanced ICs and microelectronic devices.
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FIB Sample preparation and TEM Techniques for Failure Analysis
| Co-Instructors: | Mr. Kultaransingh (Bobby) Hooghan Dr. Sam Subramanian |
Overview:
FIB systems now have numerous and important applications such as carrying out device edits to fix design error, probe circuits for failure analysis, etc. Reliable site-sample preparation capabilities of FIB, for transmission electron microscope (TEM), have also been exploited to characterize microelectronics features and process defects at atomic level resolution. This course will examine basic and advanced FIB/TEM techniques for various microelectronics failure analysis applications.
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